Synchronous rectifiers increasingly are replacing freewheeling diodes on the secondary side of DC-DC buck converters in order to increase the power conversion efficiency of the converters. One characteristic of DC-DC converters with synchronous rectification is that it is possible for the current to flow not only to the output terminals of the converter through the synchronous rectifiers but also in a reverse direction from the output terminals back into the converter, i.e., a DC-DC converter with synchronous rectification can have both current-sourcing and current-sinking capability.
In most implementations of secondary side synchronous rectifiers, one problem that exists is that the gates of the synchronous rectifier FETs (field-effect transistors) are left saturated by the gate driver circuit for these rectifiers when the DC-DC converter is turned off. This produces a negative undershoot at the positive output terminal of the DC-DC converter during turn off. This negative undershoot can be harmful to a system that is being powered by the power converter if the output voltage of the converter goes lower than approximately −0.3 volt.
More specifically, a typical synchronous rectified DC-DC converter includes two MOSFETs (metal oxide semiconductor FETs) on the secondary side of the power transformer of the converter. A first synchronous rectifier MOSFET is connected between one end of the secondary winding of the power transformer and an output capacitor. The other end of the output capacitor is coupled to the other end of the secondary winding. The second synchronous rectifier MOSFET is coupled in parallel with the output capacitor. Typically, the node common to the two synchronous rectifiers is also coupled to the positive output terminal of the converter via a filter inductor. The undershoot that occurs when the DC-DC converter is turned off is caused by the fact that the secondary side auxiliary power source Vcc will typically continue to power the gate driver circuit for the synchronous rectifiers after the converter's output voltage falls off. This causes one or both of the gates of the synchronous rectifier MOSFETs to remain saturated at turn off. This creates a path for the output inductor of the converter to discharge into as follows. During shutdown of the converter, the output inductor first discharges into the load coupled across the output terminals of the power converter as the output voltage begins to fall. Then, the polarity of the inductor reverses (due to the energy stored in the transformer core) and current is driven from the positive output terminal of the converter to the negative output terminal. This causes the voltage on the positive output terminal to go negative. A voltage lower than −0.3 volts coupled to the input of integrated circuits (ICs) powered by the DC-DC converter could cause conduction which may damage the ICs if there is enough energy present. FIG. 4A illustrates a waveform 400 which is an exemplary output voltage generated by a synchronous rectified DC-DC converter during turn off, and shows the generation of negative undershoot. As can be seen in FIG. 4A, at some time after the converter has been turned off, the output voltage of the converter drops below a baseline voltage 402, e.g., 0 volts, thereby resulting in a temporary undershoot of, in this example, about −800 millivolts.
Accordingly, there is a need to design a synchronous rectified DC/DC power converter that eliminates the occurrence of a negative undershoot when the converter is turned off, and the consequences thereof.